Low phase noise PLL multiplier

[wuliao]

I'm looking for an off-shelf programmable (through I2C or SPI) PLL with low phase noise such as -100dBc/Hz at 10kHz.
Can anyone suggest one?

Also how do to relate dBc/Hz spec. to jitter in pico-second?

 

[dushan1]

integrate the phase noise can get the phase error ,then multiply the cycle.

 

[multanova51]

Hi
Achieving -100dBc @10kHz is not a problem at 800 MHz.
I used in the past TSA5060 (Philips), LV2105 (Sanyo),
working at 433 or 868 MHz. (LV2105 via a doubler)
My experience is the VCO is the limiting factor still.
From above only the Philips one is I2C, the others have a 3 wire bus.
All are quite cheap since they are used in big qty's.

rgds

 

[wuliao]

Thank multanova51 for the information.

The Sanyo datasheet didn't specify output jitter information.
How do I tell if it meets the requirement?
The Philips device is a PLL? Why is it taking RF inputs?

What I need is a programmable PLL that has phase jitter <+/-10ps.
Can these two devices deliver the clock I need?
Are there other choices?