Without a loop filter you would almost certainly be feeding a waveform rather than a steady voltage back to the VCO and the result would be unpredictable and unstable at the very least.
If the loop time constant is too short you will get residual signal on the control voltage causing FM on the VCO but the reaction (lock) time would be fast.
If the loop time constant is too slow the lock time will be excessive and you increase the risk of hunting and frequency overshoots as it attempts to stabilize.
Loop filter is to proved dc voltage to VCO and hence VCO provides frequency based upon input control voltage. There are calculations from loop filter for stable operation of PLL like Bandwidth, damping factor, natural frequrency, phase margin.
but i wanted to know like how does the placement of resistors and capacitors, on the PCB, of loop filter affect the performance of the PLL.
Do we have any specific rules for that or that doesn't matter???