Looking for tutorial on VHDL/Verilog simultation in Modelsim

[xvibe]

VHDL/Verilog simultation

In the begginig I used the Altera MaxII+plus to simulate my projects. It worked because I only used Altera devices.
Then I needed to use Xilinx FPGAs and someone told me to use Modelsim.
Modelsim looks powerfull but it's a lot of complex (and i don't why). I can't do a fast and simple simulations like I used to do with Altera MaxII+plus.
Do you guys know any tips or good tutorals for modelsim. Not the included with the program....
And one last question, is there any thing better than Modelsim for HDL simultation? For me a VHDL/Verilog of just VHDL simulator is enough.
I'm searching for a simplier simulator than Modelsim......

 

[nand_gates]

Re: VHDL/Verilog simultation

Nothing is simpler than Modelsim Simulator!!!
Try using Cadence NC simulator for VHDL you will
agree with me!

 

[Renjith]

Re: VHDL/Verilog simultation

I can't do a fast and simple simulations like I used to do with @ltera MaxII+plus.

ModelSim is the best available tool for simulating ur designs.
and the Help in the tool gives u some example tutorials to go about.

can u tell how u were not able to do the "fast and simple simulations"

 

[samcheetah]

Re: VHDL/Verilog simultation

i havent used altera devices so obviously i cant say anything about Max Plus. but i have used xilinx devices and have used xilinx ISE. and i think that modelsim is very easy to use. maybe thats because modelsim is the most used software in my computer.

spend some weekends with modelsim. try to write as much code as time allows you. you will soon realize how easy modelsim is.

i hope that helps

 

[easytarget]

modelsim info

How much does modelsim cost? and do we have to work for a company to download the evaluation version? Thanks.

 

[jdhar]

VHDL/Verilog simultation

I learned how to simulate files in less than an hour. I'm not doing anything complex, but for basic simulation and waveform viewing, it's very easy.

 

[sp]

Re: VHDL/Verilog simultation

are modelsim really easier to use than maxplus2?....

the simple interface n powerful function of the design software is unbeatable...

so many university is using it so far,,, not just bcos of it is free.... it is amazing...

however, Altera no longer support it... now everything migrate to quartus 2... it is quite complex to deal wth... but once u get used to it... u can go back to maxplus2... it's like firefox

my regards,
sp

 

[walkon]

VHDL/Verilog simultation

to sp,

I think modelsim is easy to use. my experience with maxplus2 is so long ago that I forget all about it.

 

[echo47]

VHDL/Verilog simultation

ModelSim is an excellent simulator but the user interface is frustrating for newbies. First of all, I closed all those little windows except for Workspace, Transcript, and Wave. Then I wrote a couple of "do" scripts that make it much easier to create a new project and to quickly rerun the simulation after I edit my design. I added a "reload" button to the toolbar. I can now create a new Verilog project, simulate, edit the source (I use an external editor), and re-simulate, all in less than one minute without clicking or typing anything in ModelSim except my "reload" button. All my simulation controls are stored conveniently in my Verilog testbench, instead of some global ModelSim config file. I'm using convenience features that are included in ModelSim SE but not in ModelSim PE.

SE costs about $20K US. PE costs about $5K. There's a cheaper (free?) XE version that comes with the Xilinx ISE, but I've never tried it.

 

[elec4fun]

Re: VHDL/Verilog simultation

I understand xvibe, modelsim is good and powerfull but maxIIplus is easier to use. Indeed, you don't need to create test bench file or script to simulate a design only play with inputs in a graphic editor...

 

[dBUGGER]

VHDL/Verilog simultation

Hi,
Yes for a beginner MAX-PLUS II can really build up the interest. It is fairly easy to work and avtually there is nothing to learn in that. Once you are little bit experienced, it is time to move to ModelSim as this is very very powerful simulator. Also once you know the art of writing testbenches you will just see even how simple modelsim is.

Best Regards,

 

[eeeraghu]

Re: VHDL/Verilog simultation

There is a tutorial about modelsm techniques in IEEE papers, this would be helpful for everybody who r using modelsim

 

[feel_on_on]

VHDL/Verilog simultation

eeeraghu?where is the tutorial about modelsim?what's its name?

 

[eeeraghu]

Re: VHDL/Verilog simultation

U go to the IEEE papers and search using the keyword modelsim, u will find few materials related to that.

Hope this helps

Added after 4 minutes:

even there are other materials related to modelsim but i am unable to find where there r in the board like

Synplify Guide for
Model Technology - ModelSim

Exemplar/ModelSim Tutorial for CPLDs

Practical Tips To Increase
Effectiveness With ModelSim

Advanced Design Verification withModelSim5.8ModelSim

May be u will find these in the board but u need to search

regards
raghu

 

[bismillah]

Re: VHDL/Verilog simultation

Modelsim XE edition is free with ISE. Modelsim is easy to learn, and use. I learned it very easily, so u can too.
cheers,