Looking for references on lock-in detection in PLL

[jlee]

lock detection in PLL

Hi,

Can someone provide reference for lock-in detection circuitry in PLL? I don't see publications about lock-detector.

Thanks

 

[on1aag]

Re: lock detection in PLL

Hi,
I found something in the RCA COS/MOS Integrated circuits databook
of 1975. It's not much, but it's something.

on1aag.

 

[safwatonline]

lock detection in PLL

hello,
u may use two counters one working with the refrence and the other with the feedback , and then monitor when the counter will overflow it , by comparing the two values of the counter u can know what is the diffrence between them, u can choose the counters to provid a certain accuracy

or u can use something more easier ,but not that accurate which is adding a D-ff after each of the D-ff of the PFD each one is connected to one of the two clks , this is called cycle slipping detector which will gives a one only when two consecutive edges of one of the two clocks occur (i.e. the two clks doesnt have the same freq.)
regards

 

[davidwong]

Re: lock detection in PLL

hello,
u may use two counters one working with the refrence and the other with the feedback , and then monitor when the counter will overflow it , by comparing the two values of the counter u can know what is the diffrence between them, u can choose the counters to provid a certain accuracy

or u can use something more easier ,but not that accurate which is adding a D-ff after each of the D-ff of the PFD each one is connected to one of the two clks , this is called cycle slipping detector which will gives a one only when two consecutive edges of one of the two clocks occur (i.e. the two clks doesnt have the same freq.)
regards

Hi safwatonline,

would you please descript cycle slipping detector in detail ?

thx

 

[safwatonline]

lock detection in PLL

 

[Yun Lin]

lock detection in PLL

you can use a digital filter to do this

 

[wylee]

Re: lock detection in PLL

hello,
u may use two counters one working with the refrence and the other with the feedback , and then monitor when the counter will overflow it , by comparing the two values of the counter u can know what is the diffrence between them, u can choose the counters to provid a certain accuracy

Can you describe this detector which uses counter togather with some block diagrams?

 

[layes2]

Re: lock detection in PLL

no phase diff means lock

 

[rfsystem]

Re: lock detection in PLL

Phase loock is indicated by a phase difference not more than a specified value!

1. Using a monflop triggered by either Up or Down. If Up and is inactive while the nonflop goes inactive the loop is in lock. The nonflop delay determine the phase difference.

2. Make a OR(Up,Down) and low pass filter. If there is a minimum On-Time of the PFD you get a low DC voltage in lock. If the phase difference is getting higher the analog voltage is higher. Use an analog comparator for lock indication.

 

[safwatonline]

lock detection in PLL

sorry wylee[i dont have a scematic but i am sure that thi methode work and i know someone who implemented it.