Thanks. I got a copy elsewhere. I just wanted to know two more things.
#This book written 20 years back would hopefully cover the details of CMOS Op Amp design of that era. Do you by chance know of any book which deals with the topic focusing on modern era CMOS technology in particular. At that time, I suppose, the technology had a minimum resolution of 1 um. Nowadays it is about less than 0.01 um. If you happen to know any such book, pls. inform me.
Analog design in advanced nodes (such as 10nm, 7nm, 5nm) is VERY different form older nodes in this sense - layout parasitics in older nodes were second order effect, and devices were playing the primary role.
In advanced nodes, the layout and its parasitics are playing the primary role.
It's a first order effect.
Designs are now layout driven.
Your design is your layout.
People dealing with these advanced nodes learn this truth the hard way, because EDA industry does not help much with this transition.
You won't find any book or even articles describing these issues in detail, mostly because these details contain proprietary foundry information.
In fact, the truth of the matter is, if you do not work with these technologies, you do not need to know this (unless you are really curious).
On the other hand, if you are working with these technologies, you learn these things at work, very often - the hard way (i.e. by spending enormous amount of time, often searching in the dark, to find out some trivial things that are not explained by the foundries upfront, and explained well.)
Max