Apr 15, 2006 #1 S somayeh Newbie level 5 Joined Apr 15, 2006 Messages 8 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,343 building fifo by fpga Hi people, Could anybody go forward and build something? Any interesting to share ?? Regards,
building fifo by fpga Hi people, Could anybody go forward and build something? Any interesting to share ?? Regards,
Apr 15, 2006 #2 E EDALIST Full Member level 2 Joined Nov 27, 2004 Messages 128 Helped 12 Reputation 24 Reaction score 0 Trophy points 1,296 Activity points 992 Re: building fifo by fpga what is the problem ? you can use xilinx coregen to generate fifo. if you want to generate your own fifo, just use a DPRAM, with your own address counters, and control signals.[/i]
Re: building fifo by fpga what is the problem ? you can use xilinx coregen to generate fifo. if you want to generate your own fifo, just use a DPRAM, with your own address counters, and control signals.[/i]
Apr 17, 2006 #3 I it_boy Full Member level 3 Joined Jul 18, 2002 Messages 173 Helped 6 Reputation 12 Reaction score 2 Trophy points 1,298 Activity points 1,261 Re: building fifo by fpga these documents might be useful if you are planning to design a fifo yourself hxxp://www.geocities.com/deepakgeorge2000/vlsi_book/Asynch1.pdf hxxp://www.geocities.com/deepakgeorge2000/vlsi_book/async_fifo2.pdf
Re: building fifo by fpga these documents might be useful if you are planning to design a fifo yourself hxxp://www.geocities.com/deepakgeorge2000/vlsi_book/Asynch1.pdf hxxp://www.geocities.com/deepakgeorge2000/vlsi_book/async_fifo2.pdf
Apr 17, 2006 #4 V vishwa Banned Joined Aug 11, 2005 Messages 146 Helped 15 Reputation 30 Reaction score 2 Trophy points 1,298 Location India Activity points 0 Re: building fifo by fpga You can easily build it. Try Generate a set of registers and shift/rotate the data side by side for each clock cycle.
Re: building fifo by fpga You can easily build it. Try Generate a set of registers and shift/rotate the data side by side for each clock cycle.