Feb 17, 2012 #1 ivlsi Advanced Member level 3 Joined Feb 17, 2012 Messages 883 Helped 17 Reputation 32 Reaction score 16 Trophy points 1,298 Activity points 6,868 Hi All, Would anyone recommend a GOOD Tutorial/Guide on the implementation of the Fixed Point Arithmetic? Interview questions related to the subject are welcomed as well! Thank you!
Hi All, Would anyone recommend a GOOD Tutorial/Guide on the implementation of the Fixed Point Arithmetic? Interview questions related to the subject are welcomed as well! Thank you!
Feb 19, 2012 #2 S skogsjanne Full Member level 3 Joined May 28, 2009 Messages 172 Helped 26 Reputation 52 Reaction score 26 Trophy points 1,308 Activity points 2,084 Exactly what do you mean?
Feb 19, 2012 #3 ivlsi Advanced Member level 3 Joined Feb 17, 2012 Messages 883 Helped 17 Reputation 32 Reaction score 16 Trophy points 1,298 Activity points 6,868 I mean the HW (ASIC/FPGA) implementation of the Fixed Point Arithmetic (adders, substructors, multipliers, dividers, modulo-dividers, etc)
I mean the HW (ASIC/FPGA) implementation of the Fixed Point Arithmetic (adders, substructors, multipliers, dividers, modulo-dividers, etc)
Mar 5, 2012 #4 R Ratna Kumar Newbie level 5 Joined Oct 3, 2009 Messages 9 Helped 2 Reputation 4 Reaction score 2 Trophy points 1,283 Location Austria Activity points 1,329 Check this one...may be it will helpful to you..:!!! https://vhdlguru.blogspot.com/2010/03/fixed-point-operations-in-vhdl-tutorial.html
Check this one...may be it will helpful to you..:!!! https://vhdlguru.blogspot.com/2010/03/fixed-point-operations-in-vhdl-tutorial.html
Mar 5, 2012 #5 ivlsi Advanced Member level 3 Joined Feb 17, 2012 Messages 883 Helped 17 Reputation 32 Reaction score 16 Trophy points 1,298 Activity points 6,868 I need the same, but in Verilog
Mar 5, 2012 #6 S skogsjanne Full Member level 3 Joined May 28, 2009 Messages 172 Helped 26 Reputation 52 Reaction score 26 Trophy points 1,308 Activity points 2,084 VHDL, Verilog. Same same but different. Same ideas, different syntax. Not too difficult to translate. If you're not too lazy.
VHDL, Verilog. Same same but different. Same ideas, different syntax. Not too difficult to translate. If you're not too lazy.