Logical effort and parasitics with HSPICE

[akis]

First of all thanks for your help!

Did you measure from rise=1 to rise=2 , and from fall=1 to fall=2 ?


This is a non-inverting gate, so you have to measure propagation delay times from first rise to second rise, resp. from first fall to second fall:

.measure tpdr
+ trig v(c1) val='supply/2' rise=1
+ targ v(d1) val='supply/2' rise=2

.measure tpdf
+ trig v(c1) val='supply/2' fall=1
+ targ v(d1) val='supply/2' fall=2

I did the same thing but tpd failed again!
Any idea?

Now for fanOut 2 to 5 i have to add the gates at the output of 3rd stage. Right?

And is it necessary to run every simulation(for fanout 1...5) 5 separate times?

Or i have to add code like this:

Vdd VDD VSS 'SUPPLY'
Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 120ps 200ps
X1 A1 B1 VDD VSS INV_X1
X2 B1 C1 VDD VSS INV_X1
X3 C1 D1 VDD VSS INV_X1 m=fanout
X4 D1 E1 VDD VSS INV_X1
x5 E1 F1 VDD VSS INV_X1

.TRAN 1ps 200ps START=0ps sweep fanout 1 5 1


run this simulation but tpd was not rising every time(sometimes was falling).

here are the results:

tpdr= 1.1483E-11 targ= 1.8176E-10 trig= 1.7028E-10
tpdf= 7.4110E-12 targ= 3.5720E-11 trig= 2.8309E-11
tpd= 9.4470E-12

*** parameter fanout = 2.000E+00 ***

tpdr= 1.0593E-11 targ= 1.8298E-10 trig= 1.7239E-10
tpdf= 7.0239E-12 targ= 3.9184E-11 trig= 3.2160E-11
tpd= 8.8085E-12

*** parameter fanout = 3.000E+00 ***

tpdr= 1.0810E-11 targ= 1.8503E-10 trig= 1.7422E-10
tpdf= 6.6195E-12 targ= 4.3182E-11 trig= 3.6562E-11
tpd= 8.7147E-12

*** parameter fanout = 4.000E+00 ***

tpdr= 1.1117E-11 targ= 1.8717E-10 trig= 1.7606E-10
tpdf= 6.5845E-12 targ= 4.7403E-11 trig= 4.0819E-11
tpd= 8.8509E-12

*** parameter fanout = 5.000E+00 ***

tpdr= 1.1337E-11 targ= 1.8913E-10 trig= 1.7779E-10
tpdf= 6.1490E-12 targ= 5.1560E-11 trig= 4.5411E-11
tpd= 8.7428E-12



meas_variable = tpdr
mean = 11.0680p varian = 1.347e-25
sigma = 367.0738f avgdev = 293.1873f
max = 11.4830p min = 10.5931p

meas_variable = tpdf
mean = 6.7576p varian = 2.293e-25
sigma = 478.8820f avgdev = 367.9152f
max = 7.4110p min = 6.1490p

meas_variable = tpd
mean = 8.9128p varian = 9.205e-26
sigma = 303.3963f avgdev = 213.6820f
max = 9.4470p min = 8.7147p

 

[erikl]

I did the same thing but tpd failed again! Any idea?

Yes, this was my error, sorry! For the target, you also need =1 :

.measure tpdr
+ trig v(c1) val='supply/2' rise=1
+ targ v(d1) val='supply/2' rise=1

.measure tpdf
+ trig v(c1) val='supply/2' fall=1
+ targ v(d1) val='supply/2' fall=1

Now for fanOut 2 to 5 i have to add the gates at the output of 3rd stage. Right?

Yes!

And is it necessary to run every simulation(for fanout 1...5) 5 separate times?

Once for each fanout, yes.

Or i have to add code like this:

Vdd VDD VSS 'SUPPLY'
Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 120ps 200ps
X1 A1 B1 VDD VSS INV_X1
X2 B1 C1 VDD VSS INV_X1
X3 C1 D1 VDD VSS INV_X1 m=fanout
X4 D1 E1 VDD VSS INV_X1
x5 E1 F1 VDD VSS INV_X1

.TRAN 1ps 200ps START=0ps sweep fanout 1 5 1

Looks ok. Should run the 5 fanout simulations automatically.

run this simulation but tpd was not rising every time(sometimes was falling).

I hope this was due to the wrong =2 targ values. tpd results should always rise with fanout.

 

[akis]

I have a serious problem!

For the inverter, this is the code:

.SUBCKT INV_X1 A ZN VDD VSS
M_i_0 ZN A VSS VSS NMOS_VTL W=0.090000U L=0.050000U AS=0.004050P AD=0.004050P PS=0.180000U PD=0.180000U
M_i_7 ZN A VDD VDD PMOS_VTL W=0.135000U L=0.050000U AS=0.009112P AD=0.009112P PS=0.270000U PD=0.270000U
.ENDS

Vdd VDD VSS 'SUPPLY'
Vin A VSS PULSE 0 'SUPPLY' 0ps 20ps 20ps 120ps 280ps
X1 A B1 VDD VSS INV_X1
X2 B1 C1 VDD VSS INV_X1
X3 C1 D1 VDD VSS INV_X1
X4 D1 E1 VDD VSS INV_X1 m=fanout
x5 E1 F1 VDD VSS INV_X1

.TRAN 1ps 280ps START=0ps sweep fanout 1 5 1

.measure tpdr
+ TRIG v(C1) VAL='SUPPLY/2' FALL=1
+ TARG v(D1) VAL='SUPPLY/2' RISE=1

.measure tpdf
+ TRIG v(C1) VAL='SUPPLY/2' RISE=1
+ TARG v(D1) VAL='SUPPLY/2' FALL=1

.measure tpd param='(tpdr+tpdf)/2'

.END

I put the m=fanout at the 3rd gate(X3) but .lis file returns tpd that is not rising every time.

So i put the m=fanout at the 4th gate(X4) and the results seems fine(tpd is rising every time and i found the slope which is y = 3.038x + 6.508)

Is this correct?


BUT the biggest problem is NAND2 gate:

.SUBCKT NAND2_X1 A1 A2 ZN VDD VSS
M_i_0 net_000 A2 VSS VSS NMOS_VTL W=0.130000U L=0.050000U AS=0.008450P AD=0.008450P PS=0.260000U PD=0.260000U
M_i_5 ZN A1 net_000 VSS NMOS_VTL W=0.130000U L=0.050000U AS=0.008450P AD=0.008450P PS=0.260000U PD=0.260000U
M_i_11 ZN A2 VDD VDD PMOS_VTL W=0.135000U L=0.050000U AS=0.009112P AD=0.009112P PS=0.270000U PD=0.270000U
M_i_18 VDD A1 ZN VDD PMOS_VTL W=0.135000U L=0.050000U AS=0.009112P AD=0.009112P PS=0.270000U PD=0.270000U
.ENDS

Vdd VDD VSS 'SUPPLY'
Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 120ps 200ps
X1 A1 VDD B1 VDD VSS NAND2_X1
X2 B1 VDD C1 VDD VSS NAND2_X1
X3 C1 VDD D1 VDD VSS NAND2_X1
X4 D1 VDD E1 VDD VSS NAND2_X1 m=fanout
x5 E1 VDD F1 VDD VSS NAND2_X1

.TRAN 1ps 200ps START=0ps sweep fanout 1 5 1

.measure tpdr
+ TRIG v(C1) VAL='SUPPLY/2' FALL=1
+ TARG v(D1) VAL='SUPPLY/2' RISE=1

.measure tpdf
+ TRIG v(C1) VAL='SUPPLY/2' RISE=1
+ TARG v(D1) VAL='SUPPLY/2' FALL=1

.measure tpd param='(tpdr+tpdf)/2'

.END


It finds the first tpd but the others fail.

I hope this was due to the wrong =2 targ values. tpd results should always rise with fanout.

I tried it with =1 also but the problem remains! :!:

Please if you know Erikl or if someone else knows help me! :sad:

 

[erikl]

I put the m=fanout at the 3rd gate(X3) but .lis file returns tpd that is not rising every time.

Probably because m=fanout should be at the output of your DUT gate X3, i.e at X4, s. below:

Now for fanOut 2 to 5 i have to add the gates at the output of 3rd stage. Right?

Yes!

So i put the m=fanout at the 4th gate(X4) and the results seems fine(tpd is rising every time and i found the slope which is y = 3.038x + 6.508)

Is this correct?

Yes, of course:!: Seems ok.

BUT the biggest problem is NAND2 gate:

.SUBCKT NAND2_X1 A1 A2 ZN VDD VSS
M_i_0 net_000 A2 VSS VSS NMOS_VTL W=0.130000U L=0.050000U AS=0.008450P AD=0.008450P PS=0.260000U PD=0.260000U
M_i_5 ZN A1 net_000 VSS NMOS_VTL W=0.130000U L=0.050000U AS=0.008450P AD=0.008450P PS=0.260000U PD=0.260000U
M_i_11 ZN A2 VDD VDD PMOS_VTL W=0.135000U L=0.050000U AS=0.009112P AD=0.009112P PS=0.270000U PD=0.270000U
M_i_18 VDD A1 ZN VDD PMOS_VTL W=0.135000U L=0.050000U AS=0.009112P AD=0.009112P PS=0.270000U PD=0.270000U
.ENDS

Vdd VDD VSS 'SUPPLY'
Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 120ps 200ps
X1 A1 VDD B1 VDD VSS NAND2_X1
X2 B1 VDD C1 VDD VSS NAND2_X1
X3 C1 VDD D1 VDD VSS NAND2_X1
X4 D1 VDD E1 VDD VSS NAND2_X1 m=fanout
x5 E1 VDD F1 VDD VSS NAND2_X1

.TRAN 1ps 200ps START=0ps sweep fanout 1 5 1

.measure tpdr
+ TRIG v(C1) VAL='SUPPLY/2' FALL=1
+ TARG v(D1) VAL='SUPPLY/2' RISE=1

.measure tpdf
+ TRIG v(C1) VAL='SUPPLY/2' RISE=1
+ TARG v(D1) VAL='SUPPLY/2' FALL=1

.measure tpd param='(tpdr+tpdf)/2'

.END

It finds the first tpd but the others fail.

Please if you know Erikl ... help me! :sad:

Your code seems ok. Perhaps the pulse length is too long for your simulation time, or too short for higher fanout. You should check (and possibly post) the input & output waveforms of X3, i.e. the nodes C1 & D1 .

Try ...

Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 220ps 1000ps
.TRAN 1ps 1000ps START=0ps sweep fanout 1 5 1

 

[akis]

Your code seems ok. Perhaps the pulse length is too long for your simulation time, or too short for higher fanout. You should check (and possibly post) the input & output waveforms of X3, i.e. the nodes C1 & D1 .

Try ...
Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 220ps 1000ps
.TRAN 1ps 1000ps START=0ps sweep fanout 1 5 1

I tried it and returned me good results i think.

tpdr= 1.8183E-11 targ= 2.9656E-10 trig= 2.7838E-10
tpdf= 1.1869E-11 targ= 4.9178E-11 trig= 3.7309E-11
tpd= 1.5026E-11

tpdr= 2.2879E-11 targ= 3.0125E-10 trig= 2.7837E-10
tpdf= 1.4898E-11 targ= 5.2459E-11 trig= 3.7561E-11
tpd= 1.8888E-11

tpdr= 2.7548E-11 targ= 3.0592E-10 trig= 2.7837E-10
tpdf= 1.7594E-11 targ= 5.5133E-11 trig= 3.7540E-11
tpd= 2.2571E-11

tpdr= 3.2250E-11 targ= 3.1062E-10 trig= 2.7837E-10
tpdf= 2.0119E-11 targ= 5.7646E-11 trig= 3.7526E-11
tpd= 2.6185E-11

tpdr= 3.7026E-11 targ= 3.1540E-10 trig= 2.7837E-10
tpdf= 2.2566E-11 targ= 6.0083E-11 trig= 3.7517E-11
tpd= 2.9796E-11


Do i have to run all simulations(for INV, NAND2, NOR2 ...) with the same pulse or pulse doesnt affect the slopes and therefore the p and g's?

Thanks for your help, i hope i ll finish the project shortly...

 

[erikl]

I tried it and returned me good results i think.

tpd= 1.5026E-11
tpd= 1.8888E-11
tpd= 2.2571E-11
tpd= 2.6185E-11
tpd= 2.9796E-11

Yes, this looks fine. Congratulations!

Do i have to run all simulations(for INV, NAND2, NOR2 ...) with the same pulse or pulse doesnt affect the slopes and therefore the p and g's?

Yes, you can run all simulations with the same pulse. The slope is still the same, determined by

Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 220ps 1000ps

... and anyway it doesn't affect the input slope @ your DUT (device under test) X3 due to the buffers X1 & X2. Hence no effect on p & g .

 

[akis]

Yes, this looks fine. Congratulations!

Thanks erikl!

Yes, you can run all simulations with the same pulse. The slope is still the same, determined by

... and anyway it doesn't affect the input slope @ your DUT (device under test) X3 due to the buffers X1 & X2. Hence no effect on p & g .

I did this for all type of gates and i have good results except OR and NOR gates.
Spice returned :
tpdr= failed and targ= not found,
tpdf= failed and targ= not found therefore tpd failed.

Why these gates fail?

And moreover do you know how to see the graph with hspice.
I found it but i think its not recognise floating results and it takes it as integers.
For example the graph for these tpds shows the integers:
tpd= 1.5026E-11 (1)
tpd= 1.8888E-11 (1)
tpd= 2.2571E-11 (2)
tpd= 2.6185E-11 (2)
tpd= 2.9796E-11 (2)

 

[erikl]

I did this for all type of gates and i have good results except OR and NOR gates.
Spice returned :
tpdr= failed and targ= not found,
tpdf= failed and targ= not found therefore tpd failed.

Why these gates fail?

I'd guess you forgot to set the second input (A2) of the (N)OR gates to VSS instead of VDD ?

X1 A1 VSS B1 VDD VSS NOR2_X1

For all of them (X1 .. X5) !

And moreover do you know how to see the graph with hspice.
I found it but i think its not recognise floating results and it takes it as integers.

You didn't tell which wavetool you used, so I can't help here. With HSPICE I always used AvanWaves -- it used to work fine.

Or you could transfer your values into an Excel sheet and let it draw the diagram:

 

[akis]

I'd guess you forgot to set the second input (A2) of the (N)OR gates to VSS instead of VDD ?

For all of them (X1 .. X5) !

Yes!Now its ok. But why the 2nd input must be set to ground?

You didn't tell which wavetool you used, so I can't help here. With HSPICE I always used AvanWaves -- it used to work fine.

Or you could transfer your values into an Excel sheet and let it draw the diagram:

The graph i posted was from AvanWaves and i dont know how to fix it, but excel is a pretty good idea!

I have a last question(i hope).
In order to find parasitic delay i have to do, as you said, the same things without the loads(X4 and X5). But in this case where exactly should i put the m=fanout?

Is this right?

Vdd VDD VSS 'SUPPLY'
Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 220ps 1000ps
X1 A1 VDD B1 VDD VSS NAND2_X1
X2 B1 VDD C1 VDD VSS NAND2_X1
X3 C1 VDD D1 VDD VSS NAND2_X1
X4 D1 VDD E1 VDD VSS NAND2_X1 m=fanout

 

[erikl]

But why the 2nd input must be set to ground?

Because of the logic function of a (N)OR gate: If one of the inputs is VDD, its output is always VSS (NOR gate) resp. VDD (OR), i.e. cannot change, whatever signal is applied to the other input(s). In order to let a pulse propagate from input to output, you have to put the unused input(s) to VSS.
For (N)AND gates it's just the other way round.

The graph i posted was from AvanWaves and i dont know how to fix it, but excel is a pretty good idea!

It should be possible with AvanWaves, but I can't tell you how because it's many years ago I used it. Try somewhere in the setUp.
But if you know Excel it shouldn't be a big problem.

In order to find parasitic delay i have to do, as you said, the same things without the loads(X4 and X5).
But in this case where exactly should i put the m=fanout?

"The parasitic delay of a gate is the delay of the gate when it drives zero load.", see Weste/Harris paragraph 4.2.4
So you don't need X4 and X5 , nor do you need fanout.

Is this right?

Vdd VDD VSS 'SUPPLY'
Vin A1 VSS=0 PULSE 0 'SUPPLY' 0ps 20ps 20ps 220ps 1000ps
X1 A1 VDD B1 VDD VSS NAND2_X1
X2 B1 VDD C1 VDD VSS NAND2_X1
X3 C1 VDD D1 VDD VSS NAND2_X1
X4 D1 VDD E1 VDD VSS NAND2_X1 m=fanout

Nearly. Just remove the X4 line, and the sweep fanout command from the .TRAN line:
.TRAN 1ps 1000ps START=0ps

This will run a single simulation with a single tpd result. Then run a similar single analysis (again without load, i.e. only X1 .. X3) for the smallest INV (whatever is its name in your lib). The tpd(yourGate)/tpd(INV) ratio is the parasitic delay p of yourGate.

 

[akis]

It's all described in the Weste/Harris book, s. here: View attachment 61439 .
You should run the same simulation analyses corresponding to Fig. 5.28 for fanOut 1..n (1..8 in Fig 5.28 (b) , maybe n=4 or 5 should be enough) ...

• for your AND2
• for the smallest INV
• from their slopes ratio you'll get g
• then do the same without any load after your DUT (i.e. without the X4, X5 gates)
• then from their (AND2/INV slopes) ratio you'll get p

SOS!!! :!::!::!:

the book of waste & harris tells that if we have this curve d(abs) = 16.7h + 28.9 ps we can find g as 16.7/15ps (where 15ps is τ) and p as 28.9/15ps.


but with your way we do this:

This will run a single simulation with a single tpd result. Then run a similar single analysis (again without load, i.e. only X1 .. X3) for the smallest INV (whatever is its name in your lib). The tpd(yourGate)/tpd(INV) ratio is the parasitic delay p of yourGate.

is this the same because we find different results with these ways!

For example if i have a curve y = ax + b from the first simulation(with fanOut 1 to 5) and tpd from the second simulation(without loads) is it right to find parasitic delay dividing b/tpd_inv(2nd simulation)??

is your way absolutely right for finding parasitic delay?

 

[erikl]

Both methods are equivalent: The Weste/Harris method from chap. 5.5.3 (p. 307 in my edition) uses the y-axis intercept of the prolongation of the measured tpd vs. fanout curve (fanout h=1..5 resp. 1..8) for h=0. This extrapolated tpd value for h=0 (which means "no fanout", i.e. "no load"; the 28.9ps value from FIG 5.28 (b) is the extrapolated value for h=0 !) should be the same as that one from a no-load analysis.

Hence my method (simulation(s) without load) should result in the same value(s).