If you're using the device then you ought to have a couple handy
to measure.
What's your care-about "off" current? 1mA? 1uA? Pick one for the
experiment. Tie D=G, 10V supply, series resistor that gets you the
number for drain current at 25C. Record Vgs(25C). Now hit the oven,
take Vgs(125C). The delta is your temperature drift. Apply that drift
to the low side limit for Vgs(th) and there you go. Probably not happy
as low side limit is 1V, less a FR diode VF you would need a real nice
VOL from your driver / controller.
But VT is not an on/off cliff either. What's your "off" current close-in
to the transition, need to be and how soon, to not impose undue
stress or unacceptable switching loss (as the interval of fading
conduction should be a sliver of the cycle, it will be appear as a
switching loss although it really is shoot-through, gated, not a
capacitance stealing edge energy). So maybe it's 10mA for 100ns
instead of 1uA. Is it gonna kill you? When you're talking amps of
IOUT?
You might elect to characterize that aspect - forget the extrapolated
VT of the model, where do you hit the leakage floor (Vgs@high Vds)
Vgs-wise, and how does the floor and the subthreshold root voltage
move with temperature? Neither is in your favor but if non gate
controlled leakage is burying the channel leakage, maybe you just
fuggedaboudit (and take your lumps).