if you have been a Verilog user for a long while, you would what's linting and why it's needed;
If you have worked in VHDL for years but known nothing about it, you don't need it at all...
Linting means to run a tool that extensively checks the source for any kind of errors. It is most commonly used with C and Verilog languages to check the software and HDL, although linting tools are used with other languages as well.
It is used while compile the code (SW/HW) to make sure that it is as much bug free as possible. This helps reduce a lot of potential risks that might not be caught with conventional compilers and which may only be visible at the code usage time.
As the other poster said, google search will be a very good start for you. If you have access to commercial EDA tools like: SpyGlass, leda etc. then those tool documents will also help you to appreciate it better.
If you are interested in a training/workshop on Linting using Leda, drop me an email (cvc.training <> gmail.com, my company can help (for a price of-course).
If C coding, search for Gimpel on google.
It is a tool used for static analysis of source code to find subtle bugs and inconsistancies.
It is also used to check that code complies with a standard, such a MISRA for the Automotive industries.