Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Library/package with sequential circuits primitives In HDL (Vendors or open-source)

Status
Not open for further replies.

FlyingDutch

Advanced Member level 1
Joined
Dec 16, 2017
Messages
457
Helped
45
Reputation
92
Reaction score
55
Trophy points
28
Location
Bydgoszcz - Poland
Activity points
4,960
Hello,

I would like to ask if somebody know about library in VHDL/Verilog with soundly designed (and optimized) primitives of "sequential logic circuits" I mean basic "bricks" for elaborating more complicated sequential circuits. I mean library/package made by one of FPGA circuits vendors like Xilinx/Intel or verified open-source one. I seen such basic primitives in Intel "Quartus" software but these primitives had been available when user was using "Schematics Editor". I am interested in such library written in one of HDL languages. I found for example such simlpe definitions of T and D flip-flops. Here are examples:


TFlip-Flop.png


DFlip-Flop.png



Sorry for pasting images, but this definition I only have as an image available (it is citation from polish book about VHDL).

I mean library with all kind of flip-flops, counters, various type of registers (serial/parallel), frequency dividers etc. The best would be library/package with primitives from TTL low/medium ICs or CMOS4000 series. I mean also such bricks like "reverse counters" (with asynchronic reset,set) serial-parallel registers (also shift registers), simple ALUs,

Could someone to reccomend such library/package?

Thanks in advance and regards
 

Attachments

  • TFlip-Flop.png
    TFlip-Flop.png
    63.4 KB · Views: 80
Last edited:

High level designs (either VHDL or Verilog) are mostly witten using behavioral descriptions rather than low level macros, e.g. TTL logic equivalents.

I used Quartus maxplus2 TTL libraries with my first FPGA excercises 20 years ago and never again.
 
I used Quartus maxplus2 TTL libraries with my first FPGA excercises 20 years ago and never again.

Why, it hadf been so badly written ? I so many primitives as VHDL/Verilog functions - what is bad in such approach?

Best regards
 

For the same reason software programmers don't write in assembler, rtl engineers don't use primitives libraries. In addition to not being easy to debug a design with them or easy for others to understand, they are also non portable. Its quite normal to take rtl and compile it for multiple vendors.
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top