dqs signal for ddr2
Hi,
In DDR2 routing, u have to 3 types of lines
Databyte lanes
Address and command lines
Clock lines
Each databyte lane include 8 databits(DQ0:7), 1 DataMask(DM0), 1 Data strobe(DQS0).
For a single byte lane, u should consider DQS as the clock and route them with 100mils tolerant length matching. like wise, u do for all the bytelanes.
Route address and command lines with length matching with 100 mils matching tolerance.
route clock as separate with 20mils matching betwwn the differential pairs.
There is no need to match the DQS and clock lines.
Regards,
sandhya
Route