Hi
I'm trying to simulate LDO stabilitybut there is som e unclear issue for me
what is LDO load - I mean :
I can put as load ideal current source and sweep on load currrent and check phase margin(PM)
and from other hand I can connect reditor insread the ideal current source and sweep on the registor value
But
if i take ideal source for I=100mA or resitor for same current I get about 20dB dc gain diference which influence on stability parrametrs
So what is the right LDO load for standart Analog circuit for stability simulation
you should test with both. Resistive load will lower gain and modify pole locations whereas current load will not. So stability needs to be checked with both.
There is not "a" LDO load, there is (if you are designing the
LDO for general use) a continuum from no load to full load
current, and the customer can hang any damn thing they
want on it and complain to you about outcomes. So you
need to put a box, not a stake, about the load.
If you own the load and the part choice then you can be
less general about it.
LDO load current source or resistive :The reality is some where in between ,so i would test LDO with both resistive and current source ,ofcouse you get different AC gain from the fact that current source has high output impedance .
make sure you plot Phase margin Vs load resistor