Hi. Gurus,
I designed a SCH as the following picture. I used a 1.8V fixed voltage LDO, and linked its output to STM32 VDDA_VREF+ directly.
Now the issue is the LDO output is 2.25V, not 1.8V.
If I broke the trace into the VDDA_VREF+, the LDO output is right, i.e. 1.8V.
So what's the reason for that? Is the hardware circuit design right or not?
Best,
Tony Liu
I only had a quick scan of the datasheet... I am confused as VDDA looks like a ~2.4V regulator/reference output whose 'degraded' output is VDDA - 150 mV.
Connecting the two regulator outputs together would explain the 2.25V (2.4V - 0.15V) seen at the 1.8V LDO output when it is connected to VDDA pin.
What is VDDA_VREF+ pin, please? Input, output, configurable input or output?
I can't spot any failure in your schematic, and the V_DDA/Vref pin should be connected correctly, according to the DS. I have connected other types of STM32 MCUs in the same way.
Which LDO do you actually use, it seems there is an other part number shown below the "SPX5205" - LDO in your schematic.
As Klaus suggested, a sketch of your lyout might be of help.
Depending on what part you are using there are devices that have programmable
Vref, one of the voltages is 1.8. So would beg the question you using external because
more accuracy needed ?
It does appear the Vref is an internal bandgap derived reference.
Regards, Dana.
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Looks like you have to flip some register bits to use an external Vref, otherwise
you may be tying two regulators outputs together, the internal one and the external.
Hi, Gurus,
It seems the Vref+ voltage varies with the VCC, when LDO output trace was broken.
When VCC is 3.3V, Vref+ is 2.4V,
When VCC is 2.7V, Vref is about 1.7V.
So Vref+ seems as 2/3 of VCC, maybe the resistors fucntion.
The STM32L431 has several package, and the package we selected, STM32L431CCU6, should not have internal LDO.
Pls comments, many thanks.
Best,
Tony Liu
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PS:
And another LDO in my SCH is just replacement pin-to-pin,
I had replaced the SPX5205 with that, and get the same performance as the SPX5205.
The both LDO output are 1.8V, but linked to Vref, have the same volatge 2.25V.
This part has an internal buffer that can be enabled/disabled. This would
indicate if unbuffered the Vref is sensitive to load. I know of parts in other
manufacturers where these Vrefs are only good for a few uS of load current
when unbuffered.
You might consider talking directly to a ST FAE on this as manuals I looked at
seem not coherent on the Vref system.
It seems the Vref+ voltage varies with the VCC, when LDO output trace was broken.
When VCC is 3.3V, Vref+ is 2.4V,
When VCC is 2.7V, Vref is about 1.7V.
So Vref+ seems as 2/3 of VCC, maybe the resistors fucntion.
if I understood you correct, the LDO output voltage varies with th applied input voltage [V_out(V_in)], even when the LDO output is not connected to the MCU?
Hi, Gurus,
Finally the SW found a solution from web:
using the VDDINT(1.2V) as ADC input as Vref, but this voltage is 1.05V~1.35V in datsheet.
So no need external LDO anymore.
Any comment?
Best,
Tony Liu
I only could find VREFINT in the attached datasheet in post #3, and its voltage ranges from 1.182 V to 1.232 V for the temperature range from -40 °C to +130 °C (page 91). Page 92 includes a plot of the VREFINT voltage as a function of the ambient temperature.
Depending on your requirements by means of minimum detectable voltage change and ambient temperature, the variation might already be visible in your result. E.g. for a nominal reference voltage of 1.2 V and an ADC resolution of 12 Bit a voltage change of ~300 µV corresponds to one LSB. According to table 25 the internal typical voltage reference variation is 5 mV over the temperature range (have also a look at Fig. 20). So this variation might already influence your aimed result.