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layout of NPN in Bicmos HBT process

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sb_svce2003

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Hello All,

I designing a circuit in Bicmos HBT Process.I am using NPN.

I have used the Pcell of NPN but it does not have the substrate.And when I do a DRC , I get error "Bad Substr......"

I will be thankful if anybody can throw some clue to solve this

SB
 

I'd think every integrated transistor needs a substrate, even heterogenous ones. So put a substrate layer underneath!
 

Hello All,

I designing a circuit in Bicmos HBT Process.I am using NPN.

I have used the Pcell of NPN but it does not have the substrate.And when I do a DRC , I get error "Bad Substr......"

I will be thankful if anybody can throw some clue to solve this

SB


Maybe you have in your lib some substrate contacts?!
 

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