Layout Design for 10 bit SAR ADC

[T Thamodara Jegan]

Hi ,

I have to design SAR ADC.Front end design is completed atleast by 85%. Regarding Layout design for the same , I am stuck not knowing where to start.If anyone could suggest, it would be of great help

Thanks in advance.

 

[kenambo]

Front end design means .. Is it a schematic?

first make your device size as 3.15 in cadence and then start to place your component and route as the schematic..

 

[T Thamodara Jegan]

Thanks, My doubt is , I have the scematics ready.I am working in Tanner 15. How is the Power consumption measured by proper layout techniques? I think when the full layout design is complete, it will be understood. Say in Microwind , we have simulate command in Layout design tool . But I don't find the simulate command in Layout tool of Tanner.Probably I am missing something ....
Any idea regarding this?
thanks in advance.

 

[kenambo]

If you want to know power dissipation , you can see the current density specification and width of the metal.. from that you can calculate the power dissipation

and i think we cannot simulate in layout you have to simulate in the schematic itself.. In the layout tool you can run DRC(design rule check} and LVS(layout vs schematic} only...

check it and do well

all the best....

 

[T Thamodara Jegan]

Oh I see, so I think we are designing Layout before Packaging to ensure that we have designed the circuit according to the specification as in Schematics. So we have DRC and LVS to ensure correct design.

Thanks for your immediate reply.

 

[kenambo]

Yes absolutely after the DRC and LVS you have PEX which can be used to correct the design further..
and it verifies schematic and layouts are together..

All the best.. Do well..