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layout basic : regarding the material used for gate

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Newbie level 6
Jul 9, 2015
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why we dont prefer a metal gate over polysilicon?
what its +ves and -ves?

Metal gate has a fixed work function, and you had better
like it for both NMOS and PMOS. Poly gate is co-doped
in self aligned CMOS, has a 0 work function naturally and
puts you closer to where you want to be VT-wise with
little effort.

We used to see some metal gate processes but these
were largely "antiques" even back in the '80s. A little bit
of dabbling persists, esp in fields like III-V MESFET /
HEMT technologies where there's no good reason to
favor depositing a silicon electrode and low resistivity
in the gate matters more.

Gate before S/D implants would require a refractory
metal capable of withstanding the implant drive /
activation thermal budget. That limits you to a few
choices. Old aluminum gate technologies were non-
self-aligned (talking 4-10um gate lengths, where
you could do that).

It's interesting to see how semiconductor technologies evolve over time.
Earlier processes (for technology nodes above few microns) used metal (Aluminum) gate for MOSFETs.
Then, people switched to poly-Si, which behaves almost like a metal.
When the scaling (increased electric field in the gate oxide, and very think gate oxides) lead to a significant impact of poly depletion on effective oxide thickness - people switched again to metals.
All advanced technology nodes - 20nm, 16/14nm, 10nm - are using metal gates.

I think the main factors here are the cost, simplicity, and technology capabilities.

Dick - workfunction in Si is about 4-5 eV, and can change only within ~Eg (~1.1eV) by doping.
I think you were referring to flat band voltage - right?

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