Lattice FPGA RAM

[KingMoshe]

Hi all,
I need help with the lattice FPGA internal RAM block
After I create the RAM block I see the DATA table as follows, after I load the memory file with the values of: 0309, 0378 HEX.
defparam RAM_0_0_0.INITVAL_00 = "0x00000000000000000000000000000000000000000000000000000000000000000000000037800309" ;
When I turn to ADDRESS 00 and read the data, I get 0309.
My question is how do I turn to the next DATA 0378?

 

[KlausST]

Hi,

I have no experience with Lattice RAM.

In your RAM content I don't see "0x0378", I see "0x3780". Please confirm.

If you get "0x0309" on addres 0 ... then you get 16 bits. So I guess the memory is organized in 16 bit words.
Then "0x3780" should be at address 1.

Please show what you have tried so far and show the results.

Klaus

 

[dpaul]

"0x00000000000000000000000000000000000000000000000000000000000000000000000037800309" ;
I also have no experience with Lattice. What i do not understand is the inclusion of the 0 above. Is it a typo from your side?
Klaus is probably correct with his explanation of a 16 bit data data bus (0x0309 and then 0x0378).
If that 0 is a typo then I guess that 16 bits data is being read at a time. In that case, as Klaus says, you need to read the address sequentially and see what the bus data is.

 

[KingMoshe]

Thanks,
I was able to understand the line addresses, the 4 digits on the right are address 0 and then there is a zero separating word for word, and the next four digits (left) is address 1 and so on

 

[KlausST]

Hi,

and then there is a zero separating word for word

This is quite unusual.

If you need more help you should
* give the exact type of FPGA you re using
* tell the method how you get the SRAM content. (any HDL or is it some debugging interface...)
* is it simulation or real part

Klaus

 

[std_match]

FPGA block RAMs often have a width that is a multiple of 9 bits.
In this case I think that the word size is 18 bits, so 5 hex digits are needed for each word.
The full line has 80 characters = 16 words.