It's about time (Cadence's white paper)

Cadence's web:
h**p://www.cadence.c0m/redirects/verif_wp/intban.html

White Papers
.It's About Time -
Requirements for the Functional Verification of Nanometer-Scale ICs
(page 1 ~ page 17)

Click to get the 4451_IncisiveWP_FNL.pdf file.

Contents
1. Overview
2. Functional Verification Drivers
3. Today's Fragmented Verification Methodology
4. Unified Verification Methodology
5. Unified Verification Platform Requirements
6. Conclusions
Appendix: Critical Functional Verification Issues
---<<< Verification is an exercise in risk management >>>---
Summary
In this document, it highlights the problem (fragmentation)
in today's verification methodology and also points the
right direction to do the verification:
a unified verification methodology based on
the unified verification platform.
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Suggestion
I think the concept described in this paper
might be helpful to the design/verification engineers.
(Digital or SoC design)
------------------<<< It's about time >>>-------------------