Re: Loop stability
ashish_chauhan said:
I did not get the mono load pulse ... do you mean a 0 to 5mA step or vice versa.
It means {from 0--->0.5usec}current =0 , {from 0.5usec--->5.5usec}current =5mA , {from 5.5usec--->10usec}current =0 , and the transitions vary with 100psec rise and fall time.
ashish_chauhan said:
Is the lower loop stable? (I doubt)
As it appears from the response of the lower loop its gain is lower than 0dB for all frequencies.
ashish_chauhan said:
for ur system to be stable both the loops have to be stable...
the reason for using the lower loop is to stabilize the upper one .I don't know ,if the upper loop is stable why should I use the lower one.
I had replied to your PM ashish.
FvM said:
Actually, there is some kind of underlying loop, cause the feedforward path is feeding the main path output signal backward to input, parasiticly through compensation network. But I don't expect that it plays an important role in instabilities.
I dealt with the 3stage LDO as a 3 stage amplifier and makes a feedforward path across the first 2 stages and uses a cap across this feedfoward to control the generated zero , and the cap that connects its output to the output of the upper first 2 stages not to disturb the DC of the upper loop.
safwatonline said:
OK, here are other few comments:
1- try do stb analysis sweeping the load current (i.e. not just no load and full load but several steps), this to make sure that the PM is monotonic
You are right Safwat, when I made this I found that some values for current have phase resopnse for unstable system (this is unmonotonic change), although at full and no load the response is like as shown above (at first post)!!!!!!!!
Actually when I made the pole zero analysis , I get RHP copmplex poles !! , while all zeros in the LHP!! (varying the load current)
(note that maximum ωt I have is 20MHz )