Is XGMII interface DDR ?

[shaiko]

Hello,

Does the XGMII communication interface clock data on both rising and falling edges of the clock ?

 

[FvM]

Yes, just review IEEE 802.3 section 3, clause 46.

 

[shaiko]

just review IEEE 802.3 section 3, clause 46.

I most gladly will - as soon an Santa sends me an IEEE username & password...

1. Can you suggest a good source of information on the XMGII interface other than the official document ?
2. Same thing about XAUI.

 

[FvM]

The standard is covered by the free "IEEE Get" program

 

[shaiko]

Thanks for pointing it out.
I'm looking at section 3 - no clause 46 in it. Perhaps you have an older version of the document(?)
I see clause 46 in section 4 - it's named: "Reconciliation Sublayer (RS) and 10 Gigabit Media Independent
Interface (XGMII)".

Can you point me to the sentence that metions the DDR ?

 

[FvM]

Yes section 4, just a typo. You can see the DDR clocking in Figure 46-12.