Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Strained layers will improve one or the other's mobility
but degrade its opposite.
LDMOS structures have better Rds(on)*BV product
than thicker oxides or stacked FETs but need special
process engineered.
Silicided S/D and reduced contact-gate spacing
improves extrinsic resistance. LDD structures that
are used to improve leakage / BV tend to also be
applied to the source where they do no good (Rs
is always worse than Rd except for current mirror
match and drain linearity - degeneration). But the
LDD is often the only thing that hooks the source
/ drain up to the channel, S/D are stood off by the
spacer.
Your options may be mask accessible or may require
process fiddling. What are your tools?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.