Is post P&R simulation useful in FPGA design?

[choonlle]

Post P&R simulation

Is post P&R simulation useful in FPGA design?


Do you think it just wasting the times for doing P&R???!!

 

[echo47]

Post P&R simulation

In most of my Xilinx FPGA projects I don't bother running post-route simulation, unless I see mysterious malfunctions in the hardware FPGA. The culprit is usually a timing constraint that I applied incorrectly, or a bug in the development tools (I then complain to Xilinx).

 

[gck]

Re: Post P&R simulation

P& R simulation are most useful thing if u want to avoid malfunctioning of H/W. As per your design requirment need to give constraints. Always check P&R simulation.

 

[xstal]

Re: Post P&R simulation

it is simply a wastage of time unless you find some problem in your hardware.