msdarvishi
Full Member level 4
Hello,
I have a design that has some modules in a top file. Each module individually has some internal sub-modules. When I am trying to put the AREA_GROUP constraint for the sub-modules intended in those modules, it seems that the ISE does not recognize them and I receive the folowing error message. Can anybody help me whether it is possible to solve this problem or I will have to exclude the hierarchical design and put all the sub-modules either in the TOP file??
Any kind assistance and help is cordially appreciated.
Thanks and Regards,
I have a design that has some modules in a top file. Each module individually has some internal sub-modules. When I am trying to put the AREA_GROUP constraint for the sub-modules intended in those modules, it seems that the ISE does not recognize them and I receive the folowing error message. Can anybody help me whether it is possible to solve this problem or I will have to exclude the hierarchical design and put all the sub-modules either in the TOP file??
Any kind assistance and help is cordially appreciated.
Thanks and Regards,
Code:
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ERROR:ConstraintSystem:59 - Constraint <module_1" AREA_GROUP =CIRCUIT1;>
[sources/top.ucf(31)]: INST "module_1" not found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.