Is it possible to over-do ground planes/pours?

[OradFarez]

Hello all. I am designing an 8 layer PCB. I can't afford to do it in 10 layers so there is one ground plane layer, one split up power plane layer and six signal layers that are stacked in a way that high speed areas can have a copper pour connected to ground on every second inner signal layer. It's not perfect, but it does provide extra shielding...at least I hope so. This is the stack up just for some clarification:

TOP - Components, slow signals primarily, some power traces
GND - plane
IN1 - high speed signals, very full
IN2 - high speed but large area for copper pour in area where fast signals are on IN1
IN3 - mixed speed, less area for ground pour
IN4 - mixed speed, moderate area for ground pouring
PWR - split plane, multiple supplies
BOTTOM - components, slow signals, some power traces

The thing I am wondering about is that since I have one pure ground plane and I want to lay down copper pours that fill in all areas of the board that do not already have copper on six other layers, do I risk making bad ground loops? Do such large continous pours help eliminate these problems due to lower impedances?

The board is entirely surface mount except for some connectors and the majority of components are BGA or QFN types. There are plenty of ground vias throughout the high speed area so I think loops are minimized.

What are other peoples experiences with this sort of thing? Thanks for any help.

 

[btbass]

You realy need a solid ground plane to compliment every high speed trace. Any break in the ground beneath a high speed trace will screw up your signal as the ground return has to find a longer way round. A high speed signal travels as a wave, equally through the trace and ground. The impedance of your traces is the width and thickness of the track and the distance from the ground plane. These should be constant. Ground pouring on other layers is not a good idea in my opinion as it confuses the issue. The power plane is also important, and should be next to the ground plane.
You say high speed, what is the speed? It's the rise time that realy counts.
My stackup would be:
TOP
IN1
GND
IN2
PWR
IN3
IN4
Bottom
Good luck!

 

[OradFarez]

Hello btbass, thanks for the reply. The fastest signals are from the processor to DDR-266 RAM so the clock is 133MHz on two phases. The rise time is probably quite short on the clock signals (probably less than 1ns). The longest trace from processor to RAM is about 44mm and the trace thickness is 4 mils on IN1 and 5 mils on other layers.

There are so many suggested ways to do the layer stack and I know that having PWR and GND planes next to each other is best, but I have read that if they were, then shielding it provides against radiated high frequency signals is limited to a couple layers around the planes and the rest are more exposed. I think I might need to purchase a good design book to make sure I do this right because I would like to lay down ground pours on the inner layers, but I really worry about ground loops and distorted return paths.

 

[abhi002]

i will prefer the following layer stack up.

TOP
IN1
GND
IN2
IN3
PWR
IN4
BOTTOM

Regards