Is it possible to create DVI module in VHDL and run it from FPGA directly

[matrixofdynamism]

I am wondering if this is possible and thus posting this question here.
Is it possible to write a VHDL block that generates DVI signals and than drive a DVI connection to a display directly from the FPGA? Has anyone done this? Where can I find information on how DVI can be implemented in FPGA using VHDL?

 

[Ice-Tea]

Hi,

Perfectly possible, but depends on the FPGA you are using.

Xilinx app note on the subject

 

[shaiko]

I'm not a DVI expert - but if the voltage levels of your protocol are 3.3V (or below) and it uses purely digital signals, an FPGA can do just about anything.

 

[matrixofdynamism]

I see, what if one is using Altera FPGA? Are all DVI signals directly driveable from the FPGA or does it also need to be changed to analogue using DAC like VGA?
Is there some document that will describe exactly how DVI signals work, so a person can write one's own IP? I suppose it should not be that hard right?

 

[shaiko]

As, I said before - I'm not familiar with DVI. You have to answer this question:

"Does DVI use analog signals" ?

If the answer is "Yes" then an Altera FPGA wouldn't be enough. Read this:
https://www.cs.unc.edu/Research/stc/FAQs/Video/dvi_spec-V1_0.pdf
To answer the question about "how hard it can be to write your own DVI IP" - one has to be familiar with the protocol...

 

[TrickyDicky]

There is a clue in the accronym - "Digital Video Interface"

 

[shaiko]

Yes,
But as far as I remember, it's can be used with VGA graphic cards with a different connector...someform of backwards compatability with VGA...I might be wrong though.

 

[Ice-Tea]

The DVI connector comes in three flavors, DVI-I (digital only), DVI-A (analog only) and DVI-D both. The purpose of DVI was obviously to create a digital interface but the analog part was added for legacy reasons (with an adapter you can use your regular old VGA monitor. The analog part is basically just the 'old' analog signals routed to a new connector. To do the digital part, you need a FPGA that is capable of TMDS signalling (like the spartan-6 in the app note). If the FPGA is not capable of doing this, there are conversion chips that take in regular digital IO and that will do serialisation and TMDS conversion for you (Silicon Image poineered these devices and I believe TI has some suitable devices as well).