I have five verilog IP file in Quartus NIOS II format , and wish change them to in Xilinx IP format , the most difficult part is lcd_buffer.v which is involved in Avalon part , As I am not familiar with Xilinx , can someone help me change them to Xilinx format ?
In fact learning the AXI4 is probably more useful than knowing Avalon (which is Altera only).
When you get stuck with your code modifications post the code you've done (on this forum, no links) and a description of the problem and any testbench you're using and you'll surely get a better response (than one that tells you to go make an effort to enhance your knowledge).