anusha001
Newbie level 2
I have designed a second order 1 bit sigma delta modulator. the output is inverted i.e., during negative input cycle the Positive output pulse width is large and during positive input cycle the output pulse width is less. Don't know why the output is so.how do i correct it? Any help is much appreciated.
I have attached the schematic and output.
I have attached the schematic and output.