Interfacing FPGA with GSM module

[Biswajit.dakua1]

I have to send a message to my mobile phone using FPGA.So I am trying to interface GSM module with FPGA (DE 1) board.But i don't know how to write AT command in verilog code.Can anyone help me?

Thanks in advance
Biswajit

 

[FvM]

An intelligent control of a GSM module requires to receive and decode command responses, did you consider it?

To start bottom-up, design Tx and optionally Rx UARTs, design a state machine that replays predefined strings from a ROM, if necessary inserting variable fields. Optionally design a decoder for responses, e.g. OK, ERROR, >, if required more.

Alternatively, instantiate a small soft processor in the FPGA to do the GSM communication.

 

[Biswajit.dakua1]

An intelligent control of a GSM module requires to receive and decode command responses, did you consider it?

To start bottom-up, design Tx and optionally Rx UARTs, design a state machine that replays predefined strings from a ROM, if necessary inserting variable fields. Optionally design a decoder for responses, e.g. OK, ERROR, >, if required more.

Alternatively, instantiate a small soft processor in the FPGA to do the GSM communication.

I understand your first process. Can u explain me about alternative process .

 

[FvM]

FPGA vendors are supplying different soft processor cores, you also find simple 8-Bit processors at opencores. Some have relative small footprint (low resource consumption). They offer advantages when complex but slow sequential control programs have to be performed by the FPGA. The programs are coded e.g. in C, cross-compiled on your PC and loaded to the FPGA. But the overall project build flow becomes a lot more complex.

 

[Ishaan Karnik]

I understand your first process. Can u explain me about alternative process .

Refer the site for popular FPGA core.