Integrator design problem because of 0.5V dip at the start

[girih192002]

Hi,

I am designing simple integrator. When Reset is going in off state. integration is starting.When Integration is started. There is dip from 2.5 V to 2 V after that integration of injected current is starting.
I did not understant why there is dip of 0.5 V.

Please, help me to understand phoenomenon. Please, go through an attached simulation waveform.

 

[FvM]

Re: Integrator Design Problem

Show a circuit.

 

[girih192002]

Re: Integrator Design Problem

Show a circuit.

Here is Circuit.

 

[FvM]

Re: Integrator Design Problem

I still don't know the exact switch and signal sequence.

If the voltage step is a reaction to an input current step, we can expect insufficient integrator loop gain and high output OP output resistance.

 

[girih192002]

Re: Integrator Design Problem

I still don't know the exact switch and signal sequence.

If the voltage step is a reaction to an input current step, we can expect insufficient integrator loop gain and high output OP output resistance.

Hi FvM,

I am sorry for incomplete information. I have rectified the bug. Actually, Vcm was 2.5 V and I have given Offset = 2 V. so, There is pull down of 2.5 V to 2 V to start Integration.

Thank you FvM