EEPuppyPuppy
Junior Member level 3
I have used Virtuoso to do the sketchmatic and layout of my oscillator and other components using TSMC 65nm CMOS transistors. Now I am trying to put my components and any other TSMC 65nm components together to build a large circuit for tapeout. So I need Innovus to do the physical design.
It seems like most of the tutorials online use the netlist generated by Verilog (.v file) to import the netlist into Innovus. Since some of my components are not digital, I might not be able to use Verilog.
Could anyone help me regarding the issue that how to generate the netlist file in my case?
It seems like most of the tutorials online use the netlist generated by Verilog (.v file) to import the netlist into Innovus. Since some of my components are not digital, I might not be able to use Verilog.
Could anyone help me regarding the issue that how to generate the netlist file in my case?