INL & DNL Calculations in Cadence Spectre

Hi guys;
I've recently simulated a SAR ADC in Cadence & now I want to measure the INL & DNL of the ADC. Each conversion takes 3us. I have designed this ADC for 5 bits & therefore we are going to have 32 states in the output. I've attached my 5 bit output to a 5 bit ideal DAC so that I can compare the analog input slow ramp to the digital codes which are then converted to analog by this ideal DAC.

What do you think the simulation time should be?? I have tried 1920us so that I can collect 20 samples for each code. Every code takes 3 us & therefore 32*20*3us=1920us.

How can I plot the INL & DNL after the simulation is done?? We are going to have analog input ramp versus time & also output data (converted to analog) versus time. How should we calculate & plot INL & DNL by having these two??

Thanks.

See this ATMEL tutorial, pp. 8..19: View attachment Atmel_Data_Converter_Terminology.pdf

Hi,

i don`t think with 20 samples per code you get meaningfull DNL or INL information. It is too low of timing resolution.

Is it usefull for a 5 bit ADC to calculate DNL and INL?
For sure it is possible... But I don´t think you will do signal processing / analog signal analyzing with this low resolution ADC.

Do you expect a larger error than +/- 0.6 LSB?

If you really want to do INL/DNL measurement, then keep an eye on the analog input value at the "hold" edge of the S/H circuit.

Klaus

erikl said:

See this ATMEL tutorial, pp. 8..19: View attachment 124189

Click to expand...

Not Useful !

KlausST said:

Hi,

i don`t think with 20 samples per code you get meaningfull DNL or INL information. It is too low of timing resolution.

Is it usefull for a 5 bit ADC to calculate DNL and INL?
For sure it is possible... But I don´t think you will do signal processing / analog signal analyzing with this low resolution ADC.

Do you expect a larger error than +/- 0.6 LSB?

If you really want to do INL/DNL measurement, then keep an eye on the analog input value at the "hold" edge of the S/H circuit.

Klaus

Click to expand...

It is part of my project & I should perform these simulations. Collecting more samples per code needs days of simulation. What should I finally do to calculate INL & DNL of these ADC??

hossein_jalali said:

Not Useful !

Click to expand...

Sure it would - if you'd just bother to take the trouble and read the definitions!

hossein_jalali said:

Collecting more samples per code needs days of simulation. What should I finally do to calculate INL & DNL ...?

Click to expand...

For your few samples you can easily plot the simple arithmetic context (s. above!) for the DNL & INL results.

erikl said:

Sure it would - if you'd just bother to take the trouble and read the definitions!


For your few samples you can easily plot the simple arithmetic context (s. above!) for the DNL & INL results.

Click to expand...

Thanks. I used the formula in that text & I could plot the DNL by extracting the data from the Cadence & doing some simple calculations in MATLAB.