Improving return loss of Gain Equalizer

[Khashia]

we have a gain equalizer designed using Mellor topology however here, lumped reactive elements are replaced by microstrip components. The design as originally designed in ADS software has very good return loss and slope/freq response. However when the same equalizer is implemented through microstrip elements and simulated in HFSS, it needed optimization and tweaking in microstrip dimensions. The final design gives S21 response as required but the S11 return loss is very poor.

What could be the possible reason and how to improve this return loss? Note that microstrip lines at both ports are nominal 50 ohm characteristic impedance lines designed.

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The S11 is below 10 dB only upto 13.1 GHz, if this GEQ is inserted into the system chain how useful could it prove? provided it has around -4dB insertion loss (in addition to 10 dB attenuation slope) and poor return loss.

 

[jiripolivka]

we have a gain equalizer designed using Mellor topology however here, lumped reactive elements are replaced by microstrip components. The design as originally designed in ADS software has very good return loss and slope/freq response. However when the same equalizer is implemented through microstrip elements and simulated in HFSS, it needed optimization and tweaking in microstrip dimensions. The final design gives S21 response as required but the S11 return loss is very poor.

What could be the possible reason and how to improve this return loss? Note that microstrip lines at both ports are nominal 50 ohm characteristic impedance lines designed. View attachment 92034View attachment 92035View attachment 92038View attachment 92036View attachment 92037

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The S11 is below 10 dB only upto 13.1 GHz, if this GEQ is inserted into the system chain how useful could it prove? provided it has around -4dB insertion loss (in addition to 10 dB attenuation slope) and poor return loss.

A gain equalizer is typically a reactive component in a transmission line. As like any filter it generates mismatch you can see.
Improving such mismatch can be done by three ways: the easiest is to insert an attenuator before the equalizer. Its loss improves the S11.
Another solution is to insert a ferrite isolator which has a termination that swallows the reflections.
The third possible solution is to use an "active" isolator, an amplifier to compensate the loss mentioned in the first solution above.
There are low-cost MMIC amplifiers for 13 GHz, with ~15 dB gain. You can use a 13-15 dB attenuator before it for a good S11, or divide it in two sections like 5 dB before the amplifier and 10 dB after it, before your equalizer.

 

[Khashia]

Thanks for the detailed answer, but the amplifier you suggested wouldn't introduce gain-slope curve of its own in the chain? Plus regarding designs of Gain equalizers I've seen many designs in papers with return loss of every one of them below at least -15dB, if that's achievable then what is wrong with my design or what modification in the design could I do to achieve that? Is there some major design guideline related to return loss being ignored in my design?? Plz have a look at topology and micro strip circuit.

 

[jiripolivka]

As I wrote, S11 of your circuit may have a low value due to the reactive response which causes the loss(gain) to vary in a desired manner. I made the last version of solutions. Good MMIC amplifiers usually have a wider gain response than needed, so if there is a gain slope, combining reactive insertion loss and flat loss, overall gain can be made flat over frequency.

Location of the gain equalizer in amplifier chain can cause a ripple. In my experience I put the equalizer BEFORE the amplifier in question, and made sure the signal source did not respond to the equalizer mismatch.

 

[Khashia]

S11 of your circuit may have a low value due to the reactive response which causes the loss(gain) to vary in a desired manner.

The question is this reactive response does not cause return loss to be bad in ADS design but is causing so in Microstrip implementation,What could further be done with micro-strip layout to avoid this?