Improve PSRR of an LDO

[bhl777]

Hi All, I have an LDO whose datasheet only specified the PSRR up to 1MHz (for example, https://www.ti.com/lit/ds/symlink/reg101.pdf). If I need to improve its PSRR above 10MHz (say, 15MHz), is it a true statement to increase the output capacitance to achieve this? I am using low ESR ceramic capacitors and can use high capacitance. However, I am not sure if it is always true to increase the output capacitance to improve the PSRR in high frequencies.
Thank you!

 

[KlausST]

Hi,

I'd just add a ceramics C at the input.
Depending on current .., maybe use a RC or LC (damped resonance).
Choose a cutoff frequency in the low kHz or even lower.

Klaus

 

[dick_freebird]

At the higher frequencies you probably depend on
filter caps for most of the PSRR. The error amp loop
has the usual gain rolloff and can't help you much.

Input filter C can help if the input supply has a
reliable inductive characteristic. But now you are
getting application specific. Input filter ESR/ESL
does set a maximum filter effectiveness. N caps
of 1/N value in parallel will be a lot stiffer (low
ESL and ESR) than one big one. This may not
cost you much, or anything.

A RC, LC, RLC input filter could work if, after its
I*R drop, the supply at the LDO remains within
tolerable range. This wouldn't impact load regulation
the way an output complex filter would. But transient
performance might be compromised if the C is too
small to hold up.

Many LDOs have trouble with very low ESR output
filter caps, they need a built-in zero or get unstable.
That goes against what you want. PMOS LDOs have
a lot of trouble with positive supply noise due to the
PMOS final device's gain. You might find one of the
ULDOs using NMOS pass devices have better HF
PSRR, although these need a second auxiliary supply
higher than the power path source - got one?

I have seen a few LDOs from Linear Tech which are
pretty proud of their HF PSRR and rate it out to,
if I recall, 40MHz? Whether the rating satisfies,
would be your call.

 

[bhl777]

At the higher frequencies you probably depend on
filter caps for most of the PSRR. The error amp loop
has the usual gain rolloff and can't help you much.

Input filter C can help if the input supply has a
reliable inductive characteristic. But now you are
getting application specific. Input filter ESR/ESL
does set a maximum filter effectiveness. N caps
of 1/N value in parallel will be a lot stiffer (low
ESL and ESR) than one big one. This may not
cost you much, or anything.

A RC, LC, RLC input filter could work if, after its
I*R drop, the supply at the LDO remains within
tolerable range. This wouldn't impact load regulation
the way an output complex filter would. But transient
performance might be compromised if the C is too
small to hold up.

Many LDOs have trouble with very low ESR output
filter caps, they need a built-in zero or get unstable.
That goes against what you want. PMOS LDOs have
a lot of trouble with positive supply noise due to the
PMOS final device's gain. You might find one of the
ULDOs using NMOS pass devices have better HF
PSRR, although these need a second auxiliary supply
higher than the power path source - got one?

I have seen a few LDOs from Linear Tech which are
pretty proud of their HF PSRR and rate it out to,
if I recall, 40MHz? Whether the rating satisfies,
would be your call.

Hi dick_freebird, thank you for your help! I will look for the LTC LDOs. At the mean time, do you think this kind of EMI filter can help if I place them in the input? ( SBSMC0500474MX 470nF C EMI filter or P EMI filter https://www.mouser.com/ds/2/394/Syfer_SBSMDatasheet-464626.pdf ). I tried the ceramic caps such as 0.1uF in parallel with 10uF at the input but it does not attenuate the 15MHz noise too much. Do you think this kind of EMI filter can do the job with normal LDO?
Thank you!

 

[KlausST]

Hi,

A 10uF at 15MHz makes an Xc of about 1mOhm.
Use a ceramics one for low ESR.

A series R may improve attenuation.

For sure you need a good PCB layout.

Klaus

 

[JZJIANG]

You might find one of the ULDOs using NMOS pass devices have better HF PSRR, although these need a second auxiliary supply higher than the power path source - got one?

Hi,
As you have mentioned, we need a higher supply voltage for the control circuit of the NMOS LDO. How can we get the said higher supply voltage, by a built-in charge pump, or by utilizing the existing battery voltage, if possible? Which one has been mostly adopted in practice?
On a separate note, what does 'ULDO' stand for?
Thank you~

 

[dick_freebird]

ULDO = "ultra" low dropout regulator. Marketing mostly,
some benefit from the NMOS pass transistor in on resistance.
These are primarily aimed at the 0.6-2.5V output range with
the VAUX being the commonly available 5V resource. You
did not originally mention the product voltage. A PMOS pass
device will struggle below ~2.5V with only ground for gate
drive (and presuming if you truly want to operate near
dropout, assume VIN=VOUT+Vdropout limiting the gate drive).

A charge pump could make VAUX but then you have the
noise from that....