Implementation of a circuit from truth table in Xilinx

[miracle123]

Can I implement a circuit from truth table in Xilinx ? If so, how ?

 

[Dave_PL]

Yeah. It's just combinational logic. You just need to solve the truth table and get function (in disjunctive or cojunctive form) and write some code.

 

[permute]

or infer a ROM. eg
constant my_func : std_logic_vector(7 downto 0) := "01101001";
defines a 3b function when my_func is indexed by c,b,a.
my_func(to_integer(unsigned(c&b&a)));

 

[alexan_e]

You can write the following that behaves like a black box with input and output

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity truth_table is
  port (  input  :in std_logic_vector(2 downto 0);
          output  :out std_logic_vector(2 downto 0)
	    );
		  
end truth_table;

architecture Structural of truth_table is
  
begin
 
output <= 	"000" when input="001" 
	else	"011" when input="010"
 	else	"111" when input="100";
	
end Structural;

You can change the bit lengths according or your needs, or you can have multiple inputs or outputs.
This VHDL code can be compiled in xilinx or altera etc.

Alex