Implementation in FPGA

subraml · May 4, 2005

hi
i want to write the verilog code for the array multiplication (3x3 with 3x3 and 1x3 with 3x3 ) without a multiplier only by using adder logic

matrix has some negative value also . matrix value is less than one only
Anyone could tell me how we can do the hardware implementation of this arry multiplication

adap · May 4, 2005

You can have a look at the following link that has examples of multipliers:
http://www.csee.umbc.edu/help/VHDL/samples/samples.html

You can also refer to Computer Arithmetic books that have various multiplication algorithms.

There is also another site:
**broken link removed**
which has tools that produce multipliers but they are available upon request.

cedance · May 4, 2005

ok, i guess ur problem s towards implementation onto a hardware. if u have a static FPGA kit, then finish off the code in vhdl or verilog, find if they get synthesised and then use Webpack(Xilinx based FPGAs) to get them downloaded to the processor... i think could be done in a weeks' time if u are a beginner.

/cedance

nj_jack · May 8, 2005

you can refer to library or IP core.

Implementation in FPGA

subraml

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adap

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cedance

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nj_jack

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Implementation in FPGA

subraml

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