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Impact of Crystal's ESR on the working of a crystal

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I'd like to know how important the value of the crystal's ESR is with the working of the crystal at the right operating crystal frequency.


My question:

  1. hat does the pullability of the crystal means in simple terms and why does it matter with ESR?
  2. Also, why does ESR matter? Like how important is the value of ESR for right oscillation of the crystal? Does higher ESR imply good oscillation or lower ESR?
 

Looking at several papers, app notes, it seems pullability is not related to ESR.


But Q is proportional to ESR, it effectively increases the BW, decreases slope of
impedance curve where oscillator sustains needed phase shift. So would that
imply oscillations can occur over a broader range ?

ESR can be thought of as energy loss in a tuned circuit. Hence more G needed to
overcome losses. Lower ESR is better from that perspective.


Regards, Dana.
 

I'm using this below crystal in the below KSZ8863 IC.

enter image description here

enter image description here

Empirical try-and-fail shows that current of crystal can be easily reduced by changing primary selected capacitors (2x22pF) to e.g. 2x10pF. BY changing that capacitors there is improvement with gain margin too.

What is requested for given quartz is to decrease power of crystal (not increase by increasing capacitance value) ?

Any idea to improve the stability margin of the crystal.
 

What failure do you observe? Or is it just a guess about possible failure?
In which regard do you see lack of "stability"?

In an application with tight frequency stability requirements, load capacitors need to match the value specified for the crystal, otherwise the nominal frequency won't be achieved. Ethernet PHY has relative large frequency tolerance about 50 ppm, respectively varying load capacitance doesn't involve application problems.

Some oscillator circuits have a restricted load capcitance range and might even not oscillate with marginal capacitor values. If the oscillator is critical in this regard (don't expect it for the present device) it's advisable to choose the crystal to fit the device specification.

Maximum drive level can be problem with small crystals and high level oscillation circuits. Increasing the series resistor is a possible option to reduce the drive level.
 

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