Hi,
I know that IEEE1149.1 or the the JTAG standard is mainly for board level testing and IEEE1500 is for testing embedded cores.
And IEEE 1149.1 was originally meant to facilitate testing between devices on a PCB (EXTEST). The primary interface is a serial interface, and the behavior of that interface is controlled strictly by a state machine. The language used to define the test mechanism is BSDL.
And IEEE 1500 was defined to enable a flexible test methodology for embedded cores. A mandatory serial interface (similar to 1149.1) is defined, but there are provisions for a parallel interface as well, adding flexibility. The language used to define the behavior is CTL (IEEE 1450.6).
Then, can you explain me the difference in the mode of operation for INTEST and EXTEST for both IEEE 1149.1 and IEEE1500 standards.
thx
snr_vlsi