IC Validator LVS problem

[artho]

Hi,

I'm using X-FAB xh018 PDK with Synopsys Custom Designer.
And get the following errors:

The following schematic port nets equate to non-port layout nets

The following layout ports are not texted

Anyone have idea of what may cause this?
Thanks.

 

[erikl]

Exactly what the error message says: Seems you have no pin text on your layout pins which correspond to your schematic ports. Use a pin text label with the port name on the layout pin, either on the same metal layer or the metal label layer - this depends on the layer menu - see your PDK.