In generaly not! Also power estiamtion tools exist (most are handwritten). If you are lucky and u use only macro blocks, of course you can estiamte area, power, etc.
However, powermill or other tools helps to estimate the power, area etc.
From the architecture of the system, it is not possible to predict the chip area, power consumption. For this the design has to go through RTL or logic design stage. Before Physical implementation and after the logic design die, packaging, power can be decided.
IMHO on an architectural level you can not predict the chip parameters except if you are not using macro blocks only !!! In order to estimate the chip parameters (Area, Power) at least you need to have the RTL view of your chip. With RTL representation you can estimate chip area and power with accuracy of ~20-25% (with tools like DC, Power Compiler, etc.). Proceeding to lower levels of course more accucracy can be achieved.