I2C interface protection, Anyone put values on components for me?

[Calltronics]

I have to reverse engineer this interface to the microchip memory.
Anyone shed anylight on the value of the Zener.
Also the capacitors.

Appreciate your help

 

[KerimF]

Vcc?

 

[Calltronics]

Vcc?

Took a while to descover 3.3V

 

[FvM]

The protection circuit looks completely arbitary. Why a zener at SDA, why not at SCL or VCC?
Capacitors at SDA and SCL have to be small (maximal 10 pF range) and don't actually provide releavant protection, e.g. against ESD. At best they cut RF interferences, e.g. if the board ist placed near a GSM antenna. I2C data rate and SDA pull-up values have to be known. Vcc filters can use 100 nF up to uF range without problems.

Generally speaking, the chip may either need no protection at all or more effective protection, depending on the application enviroment. The fact that you see this circuit in a product doesn't necessarily imply that it's well considered or even serves a purpose.

 

[danadakk]

Spec on chip :

This spec seems to allow the internal protection diodes to conduct which is not advisable,
so I would clamp at Vin <= Vcc + .7. So worst case a zener value for that.

Protection considerations :

https://www.nxp.com/docs/en/application-note/AN10658.pdf

https://assets.nexperia.com/documents/brochure/Nexperia_document_brochure_ESD-Protection-Applications_022017.pdf

Protecting IO Lines From ESD

An embedded engineering site that's got your back.

blog.mbedded.ninja

Be aware that LV zeners can add a lot of C to the buss, compromising timing at the higher
speeds. So choose carefully.


Regards, Dana.