[SOLVED] I2C-Hardware problem

[sundar11]

Hi everyone
I am trying to communicate between two lpc2148 using i2c. I have got output in proteus Simulation. but in hardware i am not getting any output. i have used pullup resistor value of 10K each and supply voltage 3.3v i am using nxp development board, i am using polling method for both master and slave. any suggestions would be helpful.

 

[sankar.m8]

Ensure that one chip is master & other is slave. What is the output of I2C clock & data when you are probing? are you getting a clock output when probing? is the master is toggling data bits?

- - - Updated - - -

If output is High= Nobody is driving the bus, check on your master configuration,
If output is Low= Somebody is driving the bus / both are driving the bus

 

[sundar11]

HI
thanks for responding

the master is toggling the data , and the clock is low

 

[sundar11]

Hi everyone

I figured out the reason, there must be some delay between each data transfer, but again i am unable to identify the correct delay required for the data transfer between the mcu's. Any suggestions would be helpful


Regards
Sundar !!

 

[Realy]

Hi,for debug the iic,i use to catch the IIC wave by logic analyze,you can view the IIC speed ,it must less than 400khz....
Regards
Sundar!!

 

[sundar11]

Hi
i have a Saleae logic analyzer with me, can you explain the procedure for analyzing a i2c protocol using the logic analyzer. By checking the user guide i understand some basic things, but there is no response from the logic analyzer.


Regards
Sundar

 

[sankar.m8]

What delay are you talking about?between the stop & immediate start, the minimum bus free time is 4.7us for standard mode, 1.3us for fast mode.

Clock is low means, it is not toggling??

 

[sundar11]

Hi Sankar


The master has to wait after sending the start condition, then only the slave responds with acknowldgement, or else the slave returns NACK. so after sending start i am using 60ms delay, so that the slave will respond to it. All this happens in proteus simulation, but no response in hardware. The clock toggles no problem with that.



Regards
sundar

 

[sankar.m8]

After start condition, you need to provide the slave address followed by Rd/Wr bit, & on the 9th clock you will receive the acknowledgement. If you are not getting the acknowledgement, check the I2C address of the slave.

 

[sundar11]

Hi
i have provided the slave address and r/w bit and it's working in simulation, but in hardware there is no response.

 

[sankar.m8]

In what speed you are running the clock?...try to reduce the clock and check...verify the data which is sent by the master (Address) is correct by probing with respect to clock.

 

[sundar11]

Hi
Thanks for your reply, my clock speed is 100 khz. i think the problem is with the slave address. it did'nt acknowledges properly. is there is specific way to determine the slave address. i am using lpc2148 as slave. i fixed the address as 0x80, and tryied to communicate. i used pullup resistor value as 4.7K. supply voltage 3.3 v



Regards
Sundar

 

[sankar.m8]

Check for a I2C Slave Address Register on the Slave MCU & Enter the desired slave address. Use that slave address on the master for I2C transactions

 

[sundar11]

Hi
I have used slave address as 0x80.. i loaded it as the first byte in master transcation and in the slave address register i loaded it.. but some times the slave replies with ack, and some times it returns NACK.. if i increase the delay(60ms) the response changes vice versa. i struggling to fix this issue... any ideas would be helpful. i have attached the logic analyser snap shots.

 

[KlausST]

Hi,

Is the lpc2148 the only slave on the bus? No other slave or master causes the problems?

I don't know the lpc chip, but is itvpossible that the chip is busy sometimes and can not react to the bus.

Klaus

 

[sankar.m8]

Hi Sunder, I am not seeing the slave address 0x80 on the waveform you are provided. the SDA's falling edge is coinciding with SCL's high which means a start condition, Followed by an address 0x0. Why the SCL & SDA are initially LOW ? In the second figure, START condition is not achieved.

 

[sundar11]

Hi sankar
sorry for the late reply. while checking this issue i found the clock is always low except during the start condition. and again after the start condition the sda is always high and scl is always low. what might be the reason for this issue. but the code works with proteus simulation. any suggestions would be helpful.



Regards

Sundar

 

[shruv]

https://embeddedalltheway.wordpress.com/

I've tried arm7 to arm 7 using i2c.You can go through the code and see if it helps.

 

[sundar11]

Hi shruv

Thanks for your help.. i gone through the code, its really useful.. in slave what states are you checking, i am checking 0x60 and 0x80. any suggestions..

 

[sankar.m8]

Any other device on I2C bus?..is it possible to isolate (removing power also ok) the each chip so that we can check which device is driving the bus LOW (Clock).