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# I want to design digital filter in PIC18f

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I am getting 100mv noise at my ADC input channel, how can I remove it using DSP filter in micro-controller.

I am using PIC18f.

You need to determine characteristics of the noise in the frequency domain. The process of digital filtering consists to reduce components of the signal lying within a specific bandwidth.

How can I do that?

If the noise behave like a "white noise" ( not showing any dominant oscillation ), you certainly cannot do this digitally by algorithm, but have to check in your design if there is some aspect on layout prone to suffer interferences by induction or heating.

I need low pass filter with range 0 to 50Hz , 0 to 500 Hz and 0 to 1KHz

I am getting 100mv noise at my ADC input channel, how can I remove it

What you have failed to mentioned and Andre was attempting to determine is, the frequency or other characteristics of the stated 100mV noise.

I need low pass filter with range 0 to 50Hz , 0 to 500 Hz and 0 to 1KHz

I would be prudent to elaborate on the frequency and other characteristics of the signal of interest and its relationship to the 100mV noise.

I want to remove all signal with frequency gearter than 50HZ

To make a filter with defined cut-off frequency, you also need to know the ADC sampling frequency. And specify a filter order and type (e.g. IIR with butterworth or chebyshev characteristic). A first order filter can be implemented quite simply:

y = (1-a)*x + a*y(n-1), a = exp(-ωc/fs)

Hi,

100mV noise in an analog signal is too much. Where does it come from?

Maybe you should consider to improve signal quality before ADC.

If you need help in this, then show us your circuit.

Klaus

If you need help in this, then show us your circuit
...as well the layout and a picture of the noise.

I guess he's measring a signal wired at a bread board.

Input coming from transformer, all capacitor 0.1uf

Input frequency 50KHz

What about you give more information such as the input waveform and layout on what you are measuring the circuit ?

pure sin wave with 50KHz frequency

Still lack relevant information: what is the amplitude level ?
Are there any restrictions on posting a picture of the signal ?

10 V , pure sin wave

Hi,

as far as i can see it is not "random noise". I expect it is 50kHz ripple (of course with it´s overtones).
The ripple is caused by the half wave recitier you use.

The 50kHz are not filtered out carefully.
There is only a fiter first order. the vaues are 1k+1k to 10n parallel to 10n.
this gives 2k to 20nF. Cutoff frequency of 4kHz, but only on discarging the capacitor. During charge the impedance of the diode is low, and thus the filtering is worse.

Even with a clean 4kHz filter first orde will leave a ripple of about 8% of 50 kHz input amplitude.

My hint:

Connect a 10nF capacitor in parallel to R2 (I´m not sure is it 30k?).
This gives another first order lowpass with 1kHz cutoff frequency.
Lowering the remaining ripple from 100mV to about 2mV.

(or you could play with bigger capacitors, but this possibly makes your regulation loop slow and therefore unstable)

Klaus

Hi,

as far as i can see it is not "random noise". I expect it is 50kHz ripple (of course with it´s overtones).
The ripple is caused by the half wave recitier you use.

The 50kHz are not filtered out carefully.
There is only a fiter first order. the vaues are 1k+1k to 10n parallel to 10n.
this gives 2k to 20nF. Cutoff frequency of 4kHz, but only on discarging the capacitor. During charge the impedance of the diode is low, and thus the filtering is worse.

Even with a clean 4kHz filter first orde will leave a ripple of about 8% of 50 kHz input amplitude.

My hint:

Connect a 10nF capacitor in parallel to R2 (I´m not sure is it 30k?).
This gives another first order lowpass with 1kHz cutoff frequency.
Lowering the remaining ripple from 100mV to about 2mV.

(or you could play with bigger capacitors, but this possibly makes your regulation loop slow and therefore unstable)

Klaus

All capacitor you seen in my circuit is 0.1uf.

Ya I try bigger capacitor It make my system response too much slow, which is not acceptable.

R2 is 33K

- - - Updated - - -

Hello Klaus I use 100uf capacitor to filter out ripples from output amplifier, but new problem is that DC output which i get it's moving up and down around 200mV

Hi,

Ya I try bigger capacitor It make my system response too much slow, which is not acceptable.

Hello Klaus I use 100uf capacitor to filter out ripples from output amplifier, but ...

I suggested to use 10nF... and you say it makes it too slow...
Now you talk about 100uF (wich is 10000 times my suggested value) this makes no sense.

new problem is that DC output which i get it's moving up and down around 200mV
Your circuit is something inbetween peak measurement and average measurement. You shoud decide what you need. It seems your circuit is a voltage regulation circuit.
Therrefore a RMS calacualtion may be the best. But is is more difficult and - as long as voltage waveform is known - you may work with average.
I don´t recommend peak measuremet, because the influence of waveform (error) is bigger than with other circuits.

Now you tell DC output voltage is moving (Please specify where exactely the voltage changes and where are what value capacitors):
This may be because: input voltage does change, waveform (peak) does change, your GND reference is not stable.

Please tell us what response time you want to achieve. And what precision you need (what ripple voltage do you allow).

Klaus

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