I/O Buffer (IOB) vs. Global Clock I/O Buffer (GCLKIOB)

Status
Not open for further replies.

farrokhiyan

Junior Member level 3
Joined
Sep 17, 2007
Messages
29
Helped
3
Reputation
6
Reaction score
1
Trophy points
1,283
Activity points
1,473
clock_dedicated_route

Hi all,

Would you please tell me what is the difference between standard I/O Buffer and Global Clock I/O buffer?

how can i explicitly instantiate an I/O Buffer component for each top-level I/O signal in xilinx ISE?

tnx.
 

xil_place_allow_local_bufg_routing

From what I can remember global clock buffer are dedicated to route signal over specialized track inside the FPGA in order to minimize the skew from every block inside the device, is a sort of low timing path connected to every FF clock input that is inside the logic block.

Bye
Pow
 

    farrokhiyan

    Points: 2
    Helpful Answer Positive Rating
gclkiob

How can I instantiate a Clk signal to a standard I/O buffer (not global buffers)?
what is CLOCK_DEDICATED_ROUTE ?
 

gclkiob xilinx

just take a look at the language template, there are lots of example available.CLOCK_DEDICATED_ROUTE means that path is dedicated for clock,the path with least skew and is suitable to route clock.
 

clock_dedicated_route

farrokhiyan said:
How can I instantiate a Clk signal to a standard I/O buffer (not global buffers)?
what is CLOCK_DEDICATED_ROUTE ?

In order to use a clock signal with a standard I/O pin in Xilinx FPGAs, an environment variable XIL_PLACE_ALLOW_LOCAL_BUFG_ROUTING must be set.
 

Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…