How will the circuit behave ?

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eigenrb

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Hello ,

I have a doubt in the circuit.
Attached is the circuit

Assume , the FF is ideal ( tc2q is 0 and tsetup and thold is 0 )

How will the circuit behave ?
what is the latency from a to b ?
 

Minimum cycle time is 8+4 = 12
Latency is 4 flops between a and b , i.e 12+ 12+ 12 = 36

now u should buy me free lunch for solving your Homework problem!
 

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