elec-eng
Full Member level 5
ise synthesis report
hi
I use Xilins ISE 10.1 and I can ge thrTL view
Now I want to view the final results of the synthesis process in a graphical form (i.e. gates , multiplexers,....and their inter-connections afer optimization) in order to be able to know the quality of the synthesis process
so please tell me how to do a thing like this
hi
I use Xilins ISE 10.1 and I can ge thrTL view
Now I want to view the final results of the synthesis process in a graphical form (i.e. gates , multiplexers,....and their inter-connections afer optimization) in order to be able to know the quality of the synthesis process
so please tell me how to do a thing like this