linan_1982
Newbie level 1
is there any body konw gm id methodology, i search some materials at google. but i dont konw how can i used gm id methodology to sizing the analog circuit.
i heard some body talk to me, the gm id methodology is automated, it's not the standard process to define the transistor size, but what's the standard the process to define the transistor size.
for example , i konw the defien parameter i want ( current, the vdsat and gm,) , how can i defien the L and W.
before block circuit design, what's simulation i want to do at the transistor level?
i heard some body talk to me, the gm id methodology is automated, it's not the standard process to define the transistor size, but what's the standard the process to define the transistor size.
for example , i konw the defien parameter i want ( current, the vdsat and gm,) , how can i defien the L and W.
before block circuit design, what's simulation i want to do at the transistor level?