How to use $rand() in Verilog ?

Status
Not open for further replies.

deepu_s_s

Full Member level 5
Joined
Mar 24, 2007
Messages
305
Helped
15
Reputation
30
Reaction score
5
Trophy points
1,298
Activity points
3,021
Hello friends,

Is $rand() available in verilog? If so how to use it ? can anyone upload the docs related to that

Thanks and Regards
Deepak
 

Re: doubt in verilog

$random() is defined at least since Verilog-2001, see the IEEE spec, available at EDAboard. But it is documented only with tools, that can utilize this function. e. g. ModelSim, but not with compiler tools.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…