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how to use hyperterminal to check FPGA?

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umar2472

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i am umar and i'm working on my final year project of avionics engineering, my project is reltaed to development of video compression codec on fpga, for this reason first of all i need to send an image first get it compressed and then will lead to video. i am sending the image through the matlab, what i want to ask is that how can i check step by step the values of may be dct, or quatization i get in matlab, with those returned from fpga, i have heard ov using hyperterminal/hercules software for this purpose, but don't know how to use it, if anyone can help me out? please!
 

I use zoc transferring data from fpga to pc. To compare the results with theoretical predictions. The rate of 921 600
 
Hey, didn't know about zoc. Looks pretty useful, thanks! :)
 

Hi Treqer,
Could you please specify the exact application name and the web link to download zoc?

Thanks
 

I did not understand, can I record-HEX data in Matlab so convert them into asci codes on board fpga. and use in Matlab via import directly.
 

the entire discussion only makes sense if you have built in something in the FPGA to handle IO.

I'm guessing you don't have any of that, in which case any attempts at using rs232 will be a one-way street -- from PC to an FPGA that has no defined way to listen.

as with most communications problems, there are layers. You have a low level protocol (rs232) that delivers bytes. A higher level protocol would be needed to determine meaning. the data might be encoded before transmission as well. in such a case you have a system: data -- encoded data -- framed data -- serial data -- cable -- serial data -- framed data -- encoded data -- data. in context, encoded data might be representing data as ascii values. framed data would be something along the lines of the addition of a small header to the data (eg, command/address). serial data would be rs232 serial data. on the receiver, the rs232 rx function takes serial data, gets bytes. these bytes go to a module that looks for the header, removes it and performs the correct action (generally forwarding the data to the correct function). this data then goes to a decoder (eg, ascii to integer).

you can choose how much to do with the communcation system. you can remove the header portion if there is only one function. in general this isn't the case (eg, you may want debug functions). you can add more layers if more functions are needed (eg, a full ftp-style suite might be ok if the FPGA includes a microcontroller.)
 

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