incisive29
Newbie level 6
Hi
I am using actel's starter kit. with ProAsic3E A3P1500 PQ208 FPGA.
I have a program in which I am supposed to produce 3 clocks, one of 150MHz. 112.5MHz and 14.063MHz. Since i can't produce all three using one CCC core, I generated 112.5MHz and 14.603MHz in one core using CLA as hardwired and GLA and GLB as outputs for these clocks.
But the problem is I am not able to generate 150MHz using the second core. It gives an error in the designer that the fan out should be 1.
Hence I would like to know how to use 2 clock cores simultaneously?
I am using actel's starter kit. with ProAsic3E A3P1500 PQ208 FPGA.
I have a program in which I am supposed to produce 3 clocks, one of 150MHz. 112.5MHz and 14.063MHz. Since i can't produce all three using one CCC core, I generated 112.5MHz and 14.603MHz in one core using CLA as hardwired and GLA and GLB as outputs for these clocks.
But the problem is I am not able to generate 150MHz using the second core. It gives an error in the designer that the fan out should be 1.
Hence I would like to know how to use 2 clock cores simultaneously?